CAS LATENCY EXPLAINED
By Black Fox

     CAS Latency Is the number of clock pulses that occur between the command given to the SDRAM to output data (Read command) until the data is valid on the data outputs for the PC to use.  When a SDRAM is accessed the address is sent to the ROW address in the first cycle and to the COLUMN in the next cycle.  Once the COLUMN address is latched into the SDRAM it takes the device a given amount of time to access the data stored at the ROW and Column address selected. 

     Again the number of cycles between when the data is selected in the device to when it is output on the data bus is the "CAS Latency".
 
     Most PC systems are using bursts of 4, I will use burst length of 4 as a reference in this discussion. SDRAM's can output data for multiple addresses starting at the first address specified by the PC and automatically putting the next 4 to 8 bits of data on the bus automatically.

     100mhz has a cycle time of 10ns 133mhz 7.5ns and 150mhz is 6.67mhz. With this in mind refer to the attached picture. Notice that at 150MHZ CL3 the overall time for access in the example is 40.2ns Vs the CL2 at 133 of 37.5ns when overclocking at 150Mhz the CPU will of course run faster than at 133mhz yielding better results.
 
     If you want to compute these times to find the best working solution for your PC memory module convert the frequency to cycle using this formula 1/freq. = cycle. The bottom line is adjusting the CAS latency to a higher value when compensating for the higher processor  frequency can yield positive results.

Click on thumbnail above for a larger image.